EE/CS 119 abc
Advanced Digital Systems Design
9 units (3-3-3)
first, second terms
Prerequisites: EE/CS 10 a or CS 24.
Advanced digital design as it applies to the design of systems using PLDs and ASICs (in particular, gate arrays and standard cells). The course covers both design and implementation details of various systems and logic device technologies. The emphasis is on the practical aspects of ASIC design, such as timing, testing, and fault grading. Topics include synchronous design, state machine design, arithmetic circuit design, application-specific parallel computer design, design for testability, CPLDs, FPGAs, VHDL, standard cells, timing analysis, fault vectors, and fault grading. Students are expected to design and implement both systems discussed in the class as well as self-proposed systems using a variety of technologies and tools.
The online version of the Caltech Catalog is provided as a convenience; however, the printed version is the only
authoritative source of information about course offerings, option requirements, graduation requirements,
and other important topics.